Precision ADSR (Kassutronics)

@analogoutput already talked about it in the forum

here

and there

And I saw recently the article on the Analog Output’s blog and decided to prepare a stripboard layout, to build it soon :slight_smile:

Here all details on the Kassutronics blogspot :

here’s the schematic (i copy some info in add)

I pause a question about the led in the schem

it indicates only the output signal of the inverted signal ?
is it just used to block the current one way?
there’s not indicator led for the “standard” output ?

it’s not clear to me

thank you in advance

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The LED is connected between the standard output and the inverted output, so it tracks the standard output. It’s done this way to save an opamp; see the “Inverted output and LED driver” discussion in the Kassutronics article.

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Thanks a lot @fredrik

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I’m still intending to build this. JLCPCB order on hold until, well, until stuff. It’ll have the looping and retriggering mods mentioned in the linked post and blog. I’ll share those once I’ve got the prototype working.

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I’ve built my version and it looks like it’s working.

My version adds the following features:

  • Two switch selectable capacitors for slower and faster time scales.
  • Capacitors can be socketed for experimentation, soldered, or socketed at first and soldered later.
  • Retriggering input, allowing additional attack/decay peaks on top of the sustain.
  • Looping mode, allowing attack-decay envelopes to repeat as long as a gate is present, or, if nothing is plugged into the gate input, indefinitely. This can be used as a sequence of envelopes or as a kind of odd LFO.

Schematics, KiCad design files, Gerbers, and documentation available in GitHub repo.

I’ll have a few extra PCBs and panels up on Tindie one of these days.


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Here’s some experimentation. I set attack fairly fast, sustain 100%, release fastest and tried:

  • 1 µF aluminum electrolytic (ChengX?, Tayda A-4505)
  • 1 µF tantalum electrolytic (AVX, Tayda A-265)
  • 1 µF PET film (WIMA, Tayda A-4168)
  • 10 µF aluminum electrolytic (JB, Tayda A-4349)
  • 10 µF tantalum electrolytic (AVX, Tayda A-5226)

with a ~2.5 second gate. Results:

Interestingly, for 1 µF the tanty sags less than the aluminum, but for 10 µF the aluminum is better and the tanty is horrible. For 1 µF the film cap is pretty much perfect. This is only a sample of 1 for each value and type, of course, and any of these parts could be anomalous, but for now I think 10 µF Al and 1 µF film is the way to go.

Added:

I was shocked enough by the 10 µF tanty that I decided to look at two others. One behaved about the same. The other did stuff like this:

Seriously. I switched the two in the socket and the behavior followed the capacitor.

Maybe I can market this thing as a capacitor tester.

After a while, without changing anything I’m aware of, the crazy behavior stopped, but it lost voltage even faster than the other two.

Added more:

I’ve discovered looping stops if the decay time is turned up beyond some point, about 2/3 or a little less of the way up on the fast setting or maybe 20% of the way up on the slow setting (which is about the same decay time). The whole attack time range is available and the decay time limit doesn’t seem to depend on attack time. Sometimes it’ll go for 2 or 3 pulses before stopping. I have no idea why unless it has to do with the folly of using a TL071 as a comparator.

Added still more:

For the heck of it, I swapped the TL071 for an LM741. Because I had one. The looping still stopped, at about the same decay time — actually maybe slightly lower, but only slightly.

And yet more

OK, think I see what’s happening. I breadboarded the looping mod to make it easier to look at it. Here’s a scope picture at a fairly fast decay time, triggered by the comparator when the envelope falls below threshold:

The yellow trace is the envelope. It’s decaying slowly at the start and then the next attack begins. Purple is the comparator output, low when the envelope is above threshold and high when it’s below. Cyan trace is the trigger pulse made from the rising edge of the comparator.

That rising edge is slow, much slower than the falling edge. So the trigger is relatively wide and not that high.

Here it is with a longer decay time:

Now the rising edge is slower, so the trigger is wider and shorter. (And there’s a longer delay between the trigger and the start of the next attack, for some reason.) At some point the rising edge becomes so slow the trigger becomes too small to trigger the 555 and looping stops.

Seems the op amp does not swing abruptly when the input crosses threshold slowly.

I guess it’d be possible to condition the comparator output, to make a faster rising edge before making the trigger pulse from it. Not something I’d want to try kludging with the present PCB, though, and not clear how many components it’d be worth adding to a later version to fix it.

One more thing!

Fixed it! Just had to bump up the value of the capacitor in the gate to trigger. Now it loops even at the slowest decay speed.

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Finally got around to a video

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Hi analogoutput, just checked your video and your version of the Kassu ADSR is great!
Been checking the schematics, I have a question: the retrigger mod components are added “in parallel” to the existing C7, R11 and D7 network? I am planning to etch my own PCB using a simple program, I am not knowledgeable with more pro software that can handle Gerber and stuff. Thanks for the clarification!

This is the retrigger mod:

Added components R16, C12, R19, D9 connect to TRIG which is the base of the transistor that connects to pin 2 of the 555. Also D7 is added between C7/R11 and TRIG.

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Crystal-clear, thanks for the prompt reply, AO!

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@analogoutput, maybe a stupid question about the re triggering input.

you plug the same gate signal (after multiplied it) in input and also in re trigger input ?

The idea with retriggering is you have an envelope on already and you trigger a new attack/decay without waiting for a release. So there is a gate on and and triggers occur within that gate. The gate controls the original envelope and the triggers create the new attack/decays.

So there needs to be a gate which stays on, while triggers come in. So no, they can’t be the same signal.

That can be hard to set up with a CV keyboard, but some MIDI to CV circuits will do it, leaving a gate on as long as any key is pressed but generating a trigger each time a new key is pressed. (My MCVI does it.)

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Thank you for this infos !
Now i’m not sure to add it :slight_smile:

Good thing I came across this post. I’m currently building an ADSR module based on the fastest adsr in the west. I might just have to squeeze some of these precision mods!. Thanks @analogoutput

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In that case, if you haven’t figured it out already, maybe you need the updated repo link:

(Today’s the day I went ahead and changed the GitHub links wherever I could find them on my blog and YouTube channel to GitLab, and then nuked my GitHub account. And opened a new one, but with no repositories and minimal personal information attached, to be used just for filing issues etc.)

Sweet! I’ll set this up on the simulator, I suspect I’ll need to adjust some values. I’m wanted to use sliders for mine and all I have on hand is 50k slide pots so, figured a 47uF cap will give me similar times. Not sure what else I’ll need to adjust yet.

Hmmm… The simulator is showing some weird behavior for me. When I place the diode in the opamp feedback loop for the decay. The sustain behaves more like an offset. It causes the off-state to sit above 0v, if I move the sustain down I can get to what I would expect close to 0v, but when the sustain is high the lowest I’m seeing is about 9v. The release behaves as expected, if I can’t figure it out I’ll likely just do the mod for the release since for the decay this isn’t so much of an issue anyway.

Did you guys run into any of these sorts of issues?

Nope, not at all. If I understand you correctly, when the sustain is turned up the output voltage doesn’t release to 0 V at the end of the envelope, is that right?

I can’t see any reason why the sustain pot should affect whether the release goes to 0 V or not. When the gate turns off the non inverting input on U2a (in the schematic Dud posted) is at 0 V, and D3 allows current flow into the op amp, so the inverting input is also at 0 V. Then as long at the voltage on C3 is positive there’ll be a drop across R10/R11 hence a current: Charge therefore will flow out of the cap until it reaches 0 V. Unless there were some other source of that current, but it can’t come from U2b (which the sustain pot connects to) because the diode is the wrong direction. It could come from U1 pin 3 but that pin should be off at the end of the attack phase. So I can’t see anything that would stop the cap from discharging to 0 V.

Hmm,., I wonder if this is just something with the simulator I’m using. I’ll try a different simulator and see if I get the same result. I’ll also try breadboarding and see what I get from the oscilloscope. Will give me something to do this weekend. :stuck_out_tongue:

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I ended up breadboarding the circuit and I still got the same behavior. The interesting thing is the resistance amount at the release pot affects the sustain level. When the decay level is low sustain stays at its max. Is only when the release is almost at the midpoint that I get a difference in decay. I think the reason why this isn’t working for me is that I’ve changed the values so I can use 50K slide pots for the ADSR adjustment. The only thing I can think of is that this precision hack only works when using large pot values. ¯_(ツ)_/¯

As far as I can tell the issues with the original circuit from Rene Smitz works well enough for me so I’ll probably skip this mod and stick with the working circuit. I want to use these pots and don’t care to wait for replacement parts at this point. Hehe… I’ll try this again at some point in the future when I have some on hand. :wink: