For clarification, clocking with the LFO square wave is fine. I had it on the spike wave by mistake. It is a bit difficult to tell the wave on these 1145 LFOs. I don’t know why that was a problem for bit 6 and fine for the rest, but it seems to have been the problem.
2 Likes
Weird if that was affecting bit 6 mainly. Hard to imagine a mechanism for that. Nothing getting lost now?
2 Likes
Nothing seems to be getting lost now. I have left it running to check, and all good so far.
2 Likes
I thought that the clock input conditioning should make sure “all” kind of clock signals should work, but maybe not.
The clock input looks interesting. I don’t understand why there is a voltage divider before the comparator. The comparator is a variant with hysteresis, that’s why there is a resistor in the feedback, I did not know that, nice! The diode is probably there to prevent negative signals.
4 Likes
C16 puzzles me. It won’t do anything unless the voltage on the 12V rail or ground changes, right? For a moment I thought maybe it was to tame startup behavior but I don’t see how it’d do anything useful.
Does that explain R29? The op amp output can’t change the voltage on the + input, and thereby make hysteresis, if the + input is connected directly to a voltage source. Or to put it another way the voltage divider R29 is meant to be part of is with R28, not R34. Could that be it?
The same goes for C13, or is that a low pass filter (R29 and C13) and then R34 is just to prevent a floating input?
R29 is not required for hysteresis, if I understand this correctly:
from
1 Like
Yes. Normally you want ~100k input impedance, so 100k to ground on the input if it’s going to a + op amp input (or 100k in series going to a - input).
In that design it’s an inverting comparator with the input going to the - input and the threshold set by a voltage divider on the + input, and the feedback resistor changes the threshold. Here the input is going to the + input, as is the feedback resistor which adds a hysteresis offset to the input while the threshold stays the same. So the input must have a resistor, otherwise if it were connected directly to a voltage source the + input voltage could not change. (Probably there’s a 1k resistor on the output of the upstream module but you don’t know that, and you’ll get different hysteresis if it’s 2k or 330R or whatever.)
2 Likes
Small but important detail! Thanks for explaining 
3 Likes
@BenRufenacht Just a small thing at your PCB: I would suggest to use inline wide TO92 footprints for the tl431 and the two voltage regulators. I find them much easier to solder
2 Likes
I just discovered there’s also a Package_TO_SOT_THT:TO-92_HandSolder footprint which looks easier to solder than the TO-92_inline but doesn’t take up as much area as the wide footprint.
4 Likes
I use the handsolder footprints where available, there are a few for things like dip sockets etc. The best thing is it gives you the room to plonk the tip of your iron down on a nice bit of exposed copper making it a lot easier to get the heat in.
2 Likes
Another little suggestion for your repo is to add a .gitignore file. There’s a lot of KiCad-generated crud that doesn’t need to go in the repo. Especially the backup zip files which just keep accumulating (and old ones are auto deleted, but they’re kept in the repo). Here’s the one I generally use with KiCad repos: arpenvfol/.gitignore at main · holmesrichards/arpenvfol · GitHub
2 Likes
There does not seem to be a TO-92_Inline_HandSolder footprint but it seems to me putting the HandSolder pads inline would yield something easier to use with inline leads while still being easier to solder than the inline footprint.
2 Likes
I had already considered this after building a couple of them.
1 Like
This is something that I had tried, but failed, to get set up. I will look at yours to figure out what I was doing wrong.
One other thing I noticed (same as in the original design): The pulse output is directly the output of the 4050 buffer, no resistor in that path. I checked the dataset but there is no maximum current given (only typical??), so I am not sure, but maybe it would make sense to add a 1k resistor there?
4 Likes
One thing to be aware of is if, for instance, you ignore *.zip, it will not try to add any new *.zip files, but any *.zip files already in the current branch will continue to be handled as before.
2 Likes
CV_OUT is also potentially connected directly to an op amp or to ground if the pot is at one of its limits. It also should have a 1k.
NOISE_OUT does have a 1k.
2 Likes
There is a missing ground here in your Pulses module, @BenRufenacht (right side of R12 and the sleeve of the jack). It’s also pulse 6, so maybe it could be related to the issues? Would be weird, because this is after the AND (4081), but it’s also bit 6 and the only difference I could find between the bits 
5 Likes
Good catch, but that was not the cause of my problems. I had pulses pulled out of my case to try two volts together, and it still has the issue with bit 6. (It is also grounded through the face plate, so shouldn’t be an issue anyway). I will still update the files to correct this.
4 Likes