Reworked version of the PolyKit ADSR

To go with my 6 Poly DCO I have started the next stage in the chain which is the ADSR, I have taken Jan’s initial design and remove two Envelope generators to make it 6 channel, added some power leds, some output LED’s and CV input jacks, normaled output jacks etc…

Schematics are more or less fianly done after a bit of swapping abut.

Main I/O schematic

6x these ADSR’s

The Control Schematic

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Very nice, thanks for all the effort! Check the GAIN ADJUST trimpot, at least on the image pin 2 is not connected.

Your entirely right, pin 2 should be connected, having one of them mind blank moments.

Things have changed significantly in the last 5 hrs.

I could not get the PCB to route with free routing.

Decided to move the EG circuits to individual sub boards, and got carried away makeing them dual purpose 3310 EnvGen8 compatible…

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I decided to make this a dual purpose sub-baord, and go even further and make it a one socket two options board… do you will either populate the AS3310 or EG8 …

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Well this has totally changed plan, I have dispensed with trying to make it a dual purpose board. and just gone with the envgen8

It’s more a 6x 1158 replica now. quite an involved design for me, only learend about heireacicaiaciacfiaciai sheets 4 weeks ago.

Root Schematic.

ADSR core

CV/POT Buffer

Control Sub Board

Yikes…
image

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Q6 in the output stage of the ADSR sheet looks upside down.
image

thats a very good spot!!!

well done

R2 also seems way over the top, I probably duplicated a resistor and moved it in.

Depends on the LED. I have some for which 10k would be too small.

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Well this is so far removed from the original design it can’t realy be called polykit anymore but hey ho, will credit it anyway and the front Panel design Ethos has to stay the same.

I finished the scematic the other day and got side tracked on some other work.

Went to start the PCB last night and … Holy S…t that’s a lot to get in!!!

So I will need to split it to two boards , I think one with the Jacks and buffers, and one with the EnvGens and controls… So a bit more to do to get this over the line…

Rob

That’s the main board all but done. the 6 large pin sockets are where the “ADSR” modules will fit ( just finishing that design…


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ADSR is almost out the door to JLC, just a few labels to add …

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All went a bit “Pete Tong” Today that’s a uk reference so you may need to wiki it…

I was finishing the front panel and needed the legends for the power LED’s when I looked at the routed PCB one of them had no power. I checked the schematic and it was ok.

I deleted the tracks and the rats nest showed the power net. So I routed it again and the same result. Deleted the powernet, recreated , re, routed , same result…

Previously I had had an odd occurrence on this schematic with a phantom connection to the GND net. I deleted all the power componenets and then got an error.

So i loaded the schematic into NotePad++, deleted all the power components which were oddly still in the file.

That worked but broke the relationship with the sub-sheet and also odly lost some global labels. That fixes the schematic was looking ok again and all the power oddities hopefully sorted.

Loading the PCB and importing updates however caused the previous lost subsheet to re-generate their associations and as such delete old footprints and loaded onto the PCB in new locations. I had to cancel, reload the board without deleting footprints and then allign the new over the old before deleting the old ( although eeschematic though they were the same thing )…

Hopefully sorted and it will route out correctly now.

Rob

Usually that sort of thing can be fixed with

screenshot of Update PCB from Schematic dialog with "Re-link footprints to schematic symbols based on their reference designators" checked

unless you’ve not only broken the associations but changed the references in which case you poor bastard.

Yeah that is an option I guess, it’s different in 5.x . Never thought about it.
image

I was still trying to comprehend what the fudge was going on in the first place

Just waiting on freerouting finishing optimising.

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The ADSR board with input buffering and output stage.

Imagine the pin socket is actually a right angle pin header and these pop into the mainboard.

You could change just the module to use AS3310’s with some changes to the buffers to get the right levels.

Well that’s it off to JLC…

Time to finish the DCO and test it, and then design the a mix module for Pulse, Ramp selection. and the VCA… that’s probably 5cm +7.5cm

DCO = 10
JACK = 7.5
ADSR = 7.5
Wave Mix = 5
VCA = 7.5

Gets to 37.5CM… “Were going to need a bigger Case!”

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Found a couple of minor issues so far

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Somehow, don’t know how , not a clue…

This
image

Turned out like this

image

Apart from another slight fault it did a great job of stopping the gate input to the EnvGen8 working.

So a wrongly laid out pair of diodes. ( magically made themselves incorrect )
Not realising Gate and Trigger had to be tied on the EG8 if there was no seperate trigger.
Not having a current limiting resistor on the telltale LED’s
And the resistors being far too low on the power 3mm LED’s

It works!!!

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I am waiting on a bunch of dip sockets before I finish this off.