I submitted a JLCPCB order today including some front panels, and was quite surprised to get an email saying they can’t do plated through holes larger than 6.3 mm diameter.
And sure enough, now that I check, that’s what it says on their website.
Which hasn’t stopped them from putting 10 mm PTH in all my previous (FR4) panels with never an issue raised.
Our capability is 6.3mm.
If we do 10 mm plated through hole, the quality not guaranteed.
If you can accept the risk of bad quality we can continue proceed with 10 mm plated through hole.
The big holes are NPTH, but are surrounded by copper with plated through vias. It adheres to JLCPCB’s PTH limits, and in principle this is more robust since you don’t have the components scratching away at the through plating.
I also changed the zone connection from thermal relief to solid.
Looking again at JLCPCB’s website, they say
Min. drill size is 0.20mm. Max. drill size is 6.30mm.
so in principle these violate that. But they haven’t objected yet to larger holes; my guess is that these are routed rather than drilled, and the engineers just translate them from the drill file to the edge file…? At PCBWay it says
Min drill size is 0.2mm, max drill is 6.3mm. Any holes greater than 6.3mm or smaller than 0.3mm will be subject to extra charges.
At AllPCB:
Drilling Size 0.2–6.5mm For vias larger than 6.5mm, multiple drilling or milling is recommended
and at OSH Park:
Minimum Hole size 10 mil (0.254mm) Holes belows this size will be rounded up
Maximum Drilled Hole Size 260 mil (6.604mm) Holes exceeding this size will be milled
I suppose in principle these should be specified as cutouts on the edge layer, with copper annulus (not a pad). But let’s see if they object to my test board.
For the above test panel I specified non plated through holes in the drill file, but I’ve since come up with modified hole footprints that have the large holes specified in the edge cuts layer. Of course these would not be plated through, or at least I wouldn’t expect it. The vias obviously are drilled and plated through. I think these footprints should be fully compatible with JLCPCB’s stated capabilities so hopefully no more orders will be delayed in review like the last one, at least not for the same reason.
The hole sizes are adjusted from what I’ve used in the past in accordance with recommendations I’ve found for standard bushing sizes.
Here is my first panel done with those footprints:
Indeed the big holes are not plated through. (The mounting slots are, as was specified.) No complaints from JLCPCB (this time) so I’ll plan on doing future panels this way.
Just had a warning email generated on a Hero/Sidekick order using unmodified gerber files from gitlab. Told them to proceed as “we’ve” been happy with results using these gerbers in the past. Will let you know the results in the next week or so.
Eventhough it’s not specified in the JLCPCB capabilities, I’ve once had a plated slot manufactured without any complaints. So they’re definitely able to plate routed holes.
Yeah the Hero used the older footprints with large (routed) plated through holes. They can do them and usually do without saying anything, but I switched to the new footprints with unplated large holes and plated through vias after the one time they did hold up an order over them.
I don’t really know if it makes any odds, but all my plated holes are just vias with the spec changed. I’ve made some boards with 10mm holes without any issues.
Yeah, those are still routed holes, anything > 6 mm is whether they’re in the drill layer or the edge cuts. And plating them is not in-spec, but they usually do them without asking questions anyway.
The solder on the inside wall of the hole has come loose in some places.
As this is just the front panel I’m not worried. Just wondering if this is what they meant.