@jkb

Trying to fathom the maths on the input controls on your ADSR.

AS3310 needs 0- -5V on the CV ADR. and +5 on S

I may just be stuipid.

Output of the below network give 0-10.69V

Out put of the OPAMP at 10.69V input

trims to Give 0.18 to 1.997v

Output of this network gives 0.037v to 0.408v

Or am I missing something obvious, i would say it’s late but it’s midday.?

Cheers

Rob

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I would say your measurements and reasoning are correct. So … there must be something wrong with the schematic?

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In the datasheet there is a 10k/470R voltage divider when using 0 to -5V. This gives you something like -224mV for -5V. Datasheet states a minimum of -240mV. This can be adjusted by the trimpot.

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Presumably there doesn’t have to be a voltage divider on the input pin, just a voltage in the proper range and maybe a limiting resistor. So is there a reason not to just have the U1A amplifier gain 4x smaller and leave out R10?

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You know what, I asked this question a year or so ago, even re-read my own post/my own reply before posting this and did not realise my own answer to my own question.

I think my repeat mistake is that it’s not 5V into the chip, it’s 5V into the voltage divider supply. the aparent control voltage at the IC is 0-240mv

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digging out that coat again…

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No, I don’t think so. I more or less copied it from the Crumar Stratus schematics. I guess there are a lot of ways to get the proper voltage range.

I guess this is the rather ambiguous statement on the input voltage

And this all started with me thinking about the CV input.

Which I hopefully calculated “R1” on the jack right to be around 27K9 ( so 27K + 1K )

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That’s what I don’t like about the AS3310/CEM3310, the control voltages are a nightmare to do. I always use Electric Druid EnvGen8c chips for EGs, 0-5v for all controls, you get a level CV too for velocity etc, they can be lin/log envs for compatibility and have a lopping function. Easily installed with a 1k resistor on pin 7 for timing and a 100nf across the power and your done.

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Hmm, you need to make sure that you’re not getting below -240mA when adding both voltages. Or add the 12V to the socket switch when no jack is inserted.

Would adding 12V on the “Normal” jack not just saturate the input.

May have to think about the envgen8, not set on using the 3310 to be honest.

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Can’t seem to find a supply of 16f1764’s which is a shame as I would like to burn my own

Yeah, I have done both in the past, bought from ED and burnt my own when I realized I had a buggy version of the code, I bought a PIC programmer and reflashed all my stock to the 8C code to fix the looping bug.

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Maybe you’re right. I guess it can be adjusted on the trimpot to not exceed -240mV.

Update: perhaps add protection from negative voltage on CV input to not fry the chip?!

I chose the 3310 because of its availability (also in the future). I also tried a discrete version but it was almost impossible to get a similar timing between voices.

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There’s nothing intrinsically wrong with the AS3310 as an EG, but it just needs a lot of support chips to function. It’s around 40 years old, so nothing wrong with using a modern replacement that is more microprocessor friendly. I would also expect the envelopes to be identical as they are all using the same PIC chip.

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@craigyb Shame I can’t find the PIC , had same issue with the VCLFO… I bought a programmer but have no chips to use… Have secured an1847 to do a the Druid DCO though…

@jkb

Reverse protection hopefully? , and makes the resistor a nice 24K thanks to the voltage drop on the diode.

I may actualy bread baord this, don’t usualy…

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Actually found pics on DIGIKEY uk. So orderd a whole bunch!!

may do two ADSR designs back to back

got LFO and DCO compatible PICS too.

Series diode will subtract 0.7 V off your CV and distort it below 0.7 V. A Schottky to ground placed after R1 will pass positive voltages unchanged; it allows negative voltages to -0.2 V but after the input stage gain and voltage division that’ll be minuscule.

But do you need it at all? The datasheet says absolute maximum for control pins to ground is ±6 V.

Or was @jkb talking about limiting the voltage at the pin to be above -240 mV? But my reading of the datasheet is that that is the limit of the range for good behavior, not for not frying the chip.

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Ah, I missed that. Then it shouldn’t be a problem at all.

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