Baby 8 step sequencer schematic

[Dud]

I thought about it a bit and if it was for me the best thing is to do a 16 step directly.

or really if someone already has a baby 8, but it will also have to be modified.

here is the idea

[Farabide]

I get that. 16s are useful as 8s, 10s etc. Whereas using chained 8s you have all the faff of the last note. Stick caps on the reset inputs to make a trigger or it’ll lock up. I like your original faceplate drawing and think you should just double it.

[Farabide]

You’ll need a resistor to ground between the cap and the reset pin too. Sorry I forgot that

[Dud]

on the last schem (test chain) or the first one ?

Edit : i see it’s on the vid, for the cascade one

[Farabide]

Sorry. Im stuck in bed so I have to describe rather than draw for now.
In the chained baby8 as pin 9 (one after your 8th step) goes high you feed that to either reset (for baby8) or clock inhibit depending on your method. This signal is technically a gate but both reset and clock inhibit (pins 12and 13) work better with a trigger.
So put a 100pf cap in series with the pin and a resistor to ground to turn the gate to a trigger.

Edit: god yes of course see the video. That cap and resistor is an excellent way to make the cap fire a trigger like pulse and the resistor stops any further action.
Edit: I’ve used this before to stop baby8’s misbehaving

[Dud]

@Farabide

Sorry. Im stuck in bed

i hope nothing bad !

i just continue 1 sec to confirm and understand but i think just make a simple 8 step with my layout

so like this ?

EDIT : schem mod

[Farabide]

It’s ok, im disabled with ME/CFS im often stuck in bed (my excuse for slow progress) .
Put the cap first and the resistor to ground after the cap on the pin receiving the signal.
So… signal to cap to reset pin that also has a resistor to ground.

Edit: im also not an expert so expect others to jump in

Edit: yes thats right. You want the cap to pulse then the resistor pulls it down

[Dud]

anyway it’s a bad idea, the solution in Kristan’s video is better, even if in fact he also has as in my schem test, 3 external connections between the 2 baby 8.
thanks !

EDIT : so i need to add it also on my first schem ? there’s allready a 47K, diodes but no 100pf cap

[Farabide]

I dont like the VCA bodge but I can’t see an alternative right now.
When in doubt JFDI

[Dud]

“Return of the JFDI” que la force soit avec toi
bonne nuit

[Dud]

Some news, after some test and very little problem, all works fine !!!

very happy with the 3 positions switch for On/Mute/Reset for each step, and also to have a seq in 10cm

the good schem

[Farabide]

And pow! Another baby 8 goes on my list.
I do love your drawn schema. It’s easy to imagine that Ralph Steadman made synths.

[Dud]

i don’t know i you like stripboard for build, but mine for this is coming soon (a little revision to do before)

[Farabide]

Looking forward to the stripboard.

[saint_et_moudulard]

Nice ! Work the gates output good ? Strange, I was thinking that each step need a AND gate with a 4081 chip for exemple …

[Dud]

not tested yet the gate and trigger output.

i used this

or this

i don’t remember, i need to see and test that maybe this afternoon, hope you don’t right

[analogoutput]

In the Herrmann design, since one of Q0, Q1, Q2… Q9 is always on, if all steps are active (all switches closed) then the gate will always be on. It’ll be off for any disabled steps.

For the hand drawn one below that it’s just repeating the clock input to the gate out, so there will be a gate on and off for each step.

If what you want is a gate on and off for each enabled step and off for each disabled one then you’d have to do something like take the Herrmann design and add an AND between the clock and the gate. The gate width would be the same as the clock width.

[Dud]

thanks @analogoutput

i tested it and yes the gate out is allways on, except when i mute a step

for the AND i’m not sure, where to put it.

for the clock side :

the clock input jack or the clock after the clock circuit (Trigger label)

something like this ?

[saint_et_moudulard]

something like that:

This circuit come from the three channel trigger sequencer by Benjie Jiao. I have build it and it work very well!
I think you could be inspired by it to adding gates in your circuit

GitHub - benjiao/ThreeChannelTriggers: An 8-Step Sequencer with 3 independent...

[Dud]

Thank you, I put that aside

I have a gate output which works, but too long in time, which makes it constant.
Using the shorter clock pulse in, with an AND gate (with diode or 4081) seems interesting.
but I am not at all sure of the exact connection to make.