On the off chance that (1) it keeps someone else from having to figure it out or (2) someone else has figured it out and can spot a mistake in what I did:
I’m working on a VC LPF based on the 3320 chip, and I skimmed the CEM3320 datasheet trying to figure out what modifications to the datasheet LPF circuit need to be made for ±12 V. Ended up concluding REE should be reduced to 1.2 kΩ, and I think the rest can stay the same. In principle (if I understand it right) it looks like RB depends on VEE but only weakly — a 1.5% increase going from 15 V to 12 V, and the datasheet value is already 5% above what I calculate it should be. So no change there.
Note: IREF is nominal value and they say it can vary ±25%. If IREF is different then that implies RF, RC, and RB all should change. 12 trim pots, anyone? In practice it seems to me you could leave them alone and just have not quite optimal current levels. Am I right?