Rather than clutter up the Baby 8 thread further I wanted to ask a question about a flaw I found bread boarding.
This is the area I am looking at. CLOCK_IN also comes from the 555 timer or an external clock (but not both).
V+ is ~9V.
GATE and CLOCK_OUT will be the jack outs.
The above connects to the 4017 as follows:
So here is the issue, as above it doesn’t clock from the 555 timer, but if I use a buffered feed to the 4017 it does.
What I think is happening is rather than feeding +4.5v from the R7/R8 junction what I’ve done is tie pin 14 to ground via R8. I suspect this is due a lack of understanding about NPN transistors (and electronics to be fair), using the water metaphor is there not enough “pressure” to trigger the clock on the 4017? With the buffer as I understand no current passes the inputs so is better able to see the voltage and then can source it to a sufficient level for the 4017.
Whilst I do have a spare opamp I could use, I’d like to understand what’s happening better rather than just throw op amps at the problem when there may be a different/better solution.
Your R7/R8 absolutely is a voltage divider so the CLOCK is V+/2 — so long as there isn’t much current flowing from that point, and there shouldn’t be. 4.5 V, if your V+ is 9 V.
But there’s the problem. Took me a while to find it in the CD4017 datasheet but
That’s saying when powered with 10 V you need 7 V to trigger the 4017. Or 6.3 V if you scale it to 9 V power.
I think you could just eliminate R7 altogether. Or reduce it to something below 900R.
2 Likes
So made up electronics understanding was made up, never mind.
That makes more sense. If I move CLOCK to Q1 E R7 junction I’ll get the full 9v and it will clock regardless of what the input clock voltage is.
The idea of the divider is to get around 4.5-5V to the clock/gate outs which is within the Eurorack/Kosmo spec.
I’ll poke the breadboard in a bit and check it.
I’ll also go get the 4017 data sheet and see if I can understand it.
Observation, we all use the 4017 decade counter to build 8 step sequencers. In the same datasheet is the 4022 OCTAL counter.
2 Likes
I see no reason why the 4022 shouldn’t work.
I don’t think it’s a proper counter as it’s a divide by 8, and I cannot remember why that should matter.
JFDI Accreditation could be won when you post your working breadboard 
1 Like
I suppose the original was a baby 10, not 8 and that was that.
2 Likes
I haven’t sat down to try and simulate that part of the circuit so take this with a grain of salt, but here’s my take on it.
Falstad Circuit Simulation
I wrote a whole bunch of garbage last night about emitter followers and transistors as switches, but wanted to simulate it first to double check - turns out it was all nonsense. In the end I think it comes down to the fact that you have a 2k2 in parallel with 10k in the bottom half of the divider, which is probably giving you a lower voltage than you expect.
TLDR: what @analogoutput said.
Ah of course. I had a feeling I had to be missing something. I suppose I don’t really need R1 anymore with the above layout regardless of where the 4017 clock is taken there will always be at least 1 resistor to act as a pull down.
Does mean I’ll need to re number them all again 
Not really, because I didn’t even notice the parallel 10k, which does indeed make things worse. I can’t see any reason that’s needed. The 2.2k in the voltage divider already pulls that input down. The 10k on the RESET input is needed, otherwise that input floats when the reset switch is open. But the CLOCK input is always a well defined voltage — it just needs to be above 6.3 V, not 4.5 V.
It was indeed. Of course a 10 step sequence isn’t something you’d want as often as 8 steps, but if you can connect different 4017 outputs to the RESET you can get any length sequence you want. Yours hard wires output 9 so it’s always 8 steps. Connecting all the outputs to RESET via a rotary switch makes it more versatile, but that’s up to you.
Anyway, I guess most people figured they’d either want a hard wired 8 steps or they’d have a switch for up to 8 steps but they’d never want 9 or 10 so they simplified by leaving those outputs off… but kept using the 4017 out of habit.
One significant disadvantage to the CD4017B: At the moment, Digi-Key is out of stock. They have 3390 CD4022B. Mouser does have more than 1200 CD4017B in stock, but they have over 5000 CD4022B.
2 Likes
Found some time so here are some numbers:
V+ 9.51
With R1 10K (clock pull down) in place R8 effective resistance is 1k6
Using a DSO Shell scope to measure
CLOCK_IN 9.8V
Base 7.2v
Emitter 7.5v
Divided Voltage 3.73
Pulling the 10k out:
CLOCK_IN 9.89
Base 7.5
Emitter 7.95
Divided 3.97
tl;dr the10k does make a difference, but not a huge amount ( about 0.2v)
I will remove R1 as it’s not needed though, then re-annotate the schematic and then fix the mess on the pcb 
swapping R8 for a 3k3 gives 4.62v (and 4.86v with no 10K) which given that v+ will be a regulated 9v on the board is probably the way to go.
Demo video (I think R1 is in but it doesn’t matter) CLOCK is taken from Q1 pin 1 which is the emitter.
Now to work out what I fudged up so the Gate (yellow LED) is inversed…
Clock is off, div/V is 0 so why is the LED out of the buffer ON?
Modelled in that app above it seems to be what I’d expect.
But here’s the reality using a TL072, Pin1 is down to the left.
To help visualise, and to act as a load, I have an LED off the buffer as follows.
Scope at pin 5 shows the clock as I’d expect, high for most the cycle low for the end (duty varies between about 85% at max speed and 98% at slowest)
But at Pin 7 its inverted and there seems to be a DC offset of about +4v so clearly something isn’t quite right
Any ideas would be appreciated.
That’s one way to look at it; another is that pin 7 is right when the clock is on, but wrong when the clock is off.
Looking at pin 5, when the clock is off it appears to be -1.29 V. Why? It’s connected through a resistor to the transistor emitter, right? And it connects to ground via another resistor, so why should it ever be negative?
I’m wondering if in fact there’s a problem with that ground connection such that the clock signal is floating when it should be off, then you might definitely see something like this.
2 Likes
The readings are all relative to the little yellow arrow, “0v” was where the low on the expected was. It’s a cheap scope and I use it more like you would a CRT one, but the Vpp and freqency bits are handy. I’d like something better but it’s a hard tool to justify lots of money for when I have this and it works well enough. Same logic as to why I am still using my £5 Maplin meter I got in 2003!
That said I’ll have a look again when I get a chance.
Just spent a while poking at things on bread boards, and I’m starting to loose the will a bit which isn’t ideal.
I don’t think it’s supply noise, about 1mV on the wall wart going to about 3mV with the circuit running which doesn’t feel outrageous and filtering is only 2 47uF in the power rail.
Voltages at the TL072 supply pins are correct.
The CV buffer input has a +1.1v offset at all times using a meter (not a scope) and a nice jump to 8v when it’s it’s turn with the pot maxed. The output is offset at 1.5v, jumping to 7.5v on it’s turn in sequence. I only have 1 pot connected to test with because room. Could the 1.5v be it’s failing to drain through the LED to ground? So wouldn’t be a real issue in a real circuit feeding say an oscillator.
With the clock disconnected to test Gate buffer with a meter
Input is 0.04V, output 7.5v… in a non inverting buffer config. Yeah I have nothing here, its setup as per the small diagram a couple of posts ago.
With clock on and maxed I’m reading (an average I suppose as it’s periodic and it’s a meter) 3.6v in and about 5v out which also makes no sense as it’s not setup to amplify but that extra 1.5v has to be coming from somewhere?
Opamp is fine as far as I can tell, I did cook one a while ago but I am sure that one got binned. I tested by setting up on a 2nd breadboard, both as non-inverting buffers. Input set to 4.5v on both gave 4.5v on all pins as you would expect. No load though so I wonder if that’s what is messing things up. I also tried with a 2nd TL072 and a JRC4558D I had to hand.
I have modelled it and it works as expected. I suspect the problem is me being daft some how and I’m sort of over it now. I think I’m going to move onto the 3340 design so I can order boards before I give up entirely. Worst case Gate is useless and the CV has an offset. Rubbish for a product, but for me making bleeps and bloops whilst I learn modular it’s fine.
2 Likes
