SSI posted datasheet for their new 512-stage BBD chip

FEATURES

  • „First Modern BBD Design in Decades
  • 512-Stage Delay Chain With Clock Range
    from 1kHz to over 2MHz
  • Easy Daisy-Chaining of Multiple Units for
    Longer Delays and Access to Intermediate
    Taps
  • On-Chip Clock Driver with TTL/CMOS 5V and
    3.3V Compatible Input
  • Compact SOP8 Surface-Mount Package
  • Single 5V Operation
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Ooh! Now these do look fun!

Now what will I do with the bucket of BBDs I have already?