OTA (LM13700) based LP filter spice simulation

1

Hi guys,
my current goal is to build a state variable filter using an LM13700. I saw several schematics on the internet. Although, I got one working on breadboard, I really want to know whats going on and therefore I want to document a little bit in here what I have done today.

So since I find it quite nasty to always look up the pinout of the chips, I thought I simulate it! Therefore, I created a minimal schematic in KiCad, linked OpAmp and LM13700 spice models I found from TI and this was the result!

image
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This schematic image doesn’t show the power supply section.

I am interested in the impact of I_abc current changes and cap size changes (of Cap C3) on the cutoff frequency. First, I used the builtin ngspice simulator in KiCad, but I was not happy with the capabilities: An AC analysis delivers a nice bode plot, but only for one parameter set. In the transient analysis, if you put in white noise at the audio input, you can observe a higher correlation of the output noise, when I_abc rises – lowering the low pass cutoff frequency. But I wanted to see a family of bode plots in one plot to get a better feeling of the variation in cutoff frequency.

Software used

This is why I automated the simulation using python! I use:

  • Linux Mint
  • Conda for virtual environments
  • ngspice version 34 (compiled from source, tried newer versions but it didn’t work)
  • python 3.13.4
  • several python libraries, essentially numpy, matplotlib & pyspice

So, how does the workflow look like?

  1. Design schematic in KiCad with spice models linked in symbols
  2. Export netlist
  3. Then execute my Python script, that
  4. → Loads the netlist
  5. → For-Loop: 1. Changes parameter 2. does AC-Analysis 3. Then plots
  6. → Show the plot

What did I get?

Plot 1: Capacitor C3 varied, I_abc const. at 0.5uA

bode_sweep_cap
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Plot 2: I_abc varied, Capacitor C3 const. at 10pF

bode_sweep_Iabc
bode_sweep_Iabc1920×1280 71.2 KB

Conclusion

I must say that I am not that impressed - I hoped to get a bigger variation in cutoff-frequency. I would love to see the cutoff frequency varying between like 50Hz and 15kHz, so maybe 3 decades. But currently, its more or less 1 decade when varying I_abc (that is limited to 0-8uA I guess).

Side note: You can see in Plot 2, that the magnitude is weird for I_abc=0.01uA, since the pass band is amplified more than at the other graphs. I do not have an explanation, but if one loweres the I_abc current even more, ngspice crashes.

Questions

Is something wrong with the simulation? You people built filters using the LM13700, so I guess the freq. response is realistically not that “bad” in terms of cutoff freq. variation.

Or do you think, the bode plots seem somehow realistic? What are your experiences with values like the capacitor size?

Thanks for reading and a good night from Germany xD

1 Like
2

The bias current I_ABC can be a lot larger than in your simulations. The spec sheet says the transconductance has 6 decades of range and it is directly proportional to I_ABC. The spec shows various parameter values for I_ABC from about 0.4”A all the way up to 1mA.

LM13700-gm-vs-I_ABC
LM13700-gm-vs-I_ABC431×376 11.2 KB

Your simulations basically stayed below the bottom end.

3

hi, thank you very much! That’s helpful. I also found some other errors, here is the summary:

  • I_abc was too low (I am now trying to scale between 0.4uA and 1mA as long as I don’t use the linearizing diodes)
  • Input differential voltage was too high: around 10mV, but should be below 4mV according to datasheet (without linearizing diodes)
  • The C1 capacitor was to small: It should be around 560pF instead of 10pF

I simplified the schematic:

  • Audio In is a sinusoidal with 4mV amplitude
  • I_abc is sweeped between 0.4uA and 1mA in a logarithmic fashion
  • C1 is constant 560pF
  • Power Supply is ±9V with GND in between
  • OTA_OUT signal is analyzed now (without buffering)

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Here are the new results

image
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Interpretation of measurement results

  • The Gain and Phase plots now make sense: The more input bias current, the higher the cutoff freq.
  • The two additional plots tell
    • The maximum gain basically doesn’t change, which is good
    • The cutoff frequency varies a lot - although not that nicely with a very steep edge at the low I_abcs.
  • The goal from the first post is met! By varying I_abc, we can achieve a variation in cutoff frequency in more or less 6 decades, which is awesome

Doubts

  • I don’t like that steep edge in the lower right plot - it means that we need to set I_abc very precicely to achieve cutoff frequencies between 10Âč and 10⁎. (And for higher I_abcs, the cutoff-variation is to low)
  • Do you think, a linear to exponential converter makes sense in this context so that we can flatten the cutoff-frequency graph? In the next few days, I will experiment and read about this
4

Yes, VCFs based on these types of OTAs usually have an exponential voltage-to-current converter to get a volt-per-octave control of the cutoff frequency.
Fortunately a bypolar transistor is naturally an exponential voltage to current converter.
See for example RenĂ© Schmitz’s MS-20 inspired VCF: https://www.schmitzbits.de/ms20.html or Sam’s filters inspired by it.

5

Ah ok - The double transistor pair in the Schmitzbits MS20 example is both a current mirror and linear to exponential converter, right? And what is the purpose of the feedback opamp A4?

6

Hi, im not sure how good you are in reading schematics but recently i’ve build the 2pole 12db state variable filter with resonance cv from Music From Outer Space. This is a very good filter so my advice is to build this one.:+1::grin:

Use the search option, type mfos and you’ll find my post regarding this filter. Schematics sheet 1 and 2. Sheet 1 is further down the post. Success building

2 Likes
7

Ahh yess I was looking at this schematic and was really impressed! I also want to build a state variable filter in the future, probably something like this one. I am a little bit new though and want to understand how the signals are scaled to fit all the parts and play around with the schematic before designing a PCB etc.

Btw. your state variable filter implementation looks very cool, also with those embossed labels.
And how did you decide on PCB layout? Did you just soldered in IC sockets and then somehow put all the components around? Or did you have a plan in advance?

IMG_0527.HEIC
IMG_0527.HEIC3024×4032 2.82 MB

1 Like
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Hi, i first put things on a breadboard, this way i can test if everything works but also to estimate the measurements of the PCB. I tend to solder very compact by placing the resistors vertical instead of horizontal. Then i solder the IC sockets first yes, and then the power traces to the IC’s. I use the cutoff excess wire legs from components as wires. Try to divide schematic in smaller sections or parts to build from. Then check everything you solder 4 times. When turning the pcb you have mirrored view so easy to make mistakes there. Thats how i do it in a nutschell. Just ask if things are not clear. If i can help i will..

Oh and you also need this.
Its where al pots and jack’s go

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1 Like
9

I second the motion being a MFOS fanperson. I have both the state variable filter and the 24db lp filter and i love them.

2 Likes
10

Ah thank you very much!

Yess I already tried the Eddy Bergman version! (only in LP configuration though). It works nicely! Next to the TL074 and the LM13700 I included a Cutoff-CV-Input inverter with the TL072 at the bottom. I wanted to have acid sounds and my VCOs unfortunately only have rising Sawtooth-Output. Currently I am looking around about what filter designs appeal to me, but I didn’t finish one yet.

Thanks for your kind help - currently I am not really able to ask any useful questions since I am procrastinating
I need to finish that university lecture lol

IMG_0528.HEIC
IMG_0528.HEIC3024×4032 3.23 MB

1 Like
11

That is my understanding, yes, but looking closer at the circuit I realized that I don’t understand it.
In a typical current mirror, the two transistors have equal VBE and thus equal collector current, but in this case, it doesn’t seem like the two transistors have the same VBE so something else is going on.
Fortunately, René explains his circuit: https://www.schmitzbits.de/expo_tutorial/index.html
I haven’t read his explanation yet, so I don’t know if I’ll understand it.

12

Your welcome​:grin::+1: and good luck with lecturing