Designing an exciter

Thanks! What size of breadboard would you recommend?

The size he recommends is good, but a single one gets cramped! They have little notches to combine two of them if desired.

This is my main system with a DIY’d power supply (made with the cheap version, so connections can be flaky), plus my 3D printed wire tray (solid-code wire is more reliable than dupont jumpers), and a mini-breadboard with a 3D printed module holder (useful to experiment with microcontrollers at my computer!)

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Nice! I wonder, why would one need a breadboard with virtual simulations available?

Well, for starters, you’ll find that any interesting chip you want to work with probably has no simulation available, plus second, the simulations model ideal behavior, sometimes very simplified.

Plus in audio, sometimes changing a single resistor or capacitor somewhere yields an interesting sound, nothing beats hands-on experimentation for that.

Ordering a PCB is cheap but takes two weeks unless you pay a big premium, but it’s still possible to use the PCB as a form of prototype.

For the most recent prototype i made it was impractical to breadboard such a big circuit all at once, i added a bunch of jumpers in the middle of the circuit, the yellow jumpers confirm the connections. One part of my circuit was a bit faulty, so it will be easy to bodge a fix by adding a few components to an add-on board and wiring it to one of those test pins.

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Hello again,
I have cleaned up the design a bit, optimizing the OpAmp count, when I noticed that the original design had the ‘Dry’ band inverted before summing it with the saturated band.
So my question is: Should I add an inverting OpAmp at the red ‘x’, or should I switch the signal from Inverting to Non-Inverting at the blue ‘x’ ?

I think it is correct as is. U1A buffers without inverting. The dry band is inverted by U2C and re-inverted in the sum by U1B. Meanwhile the saturated band is filtered without inversion by U2A, inverted by U2B, saturated without inversion by U2D, and re-inverted in the sum by U1B. Pretty sure, anyway. As I said above, it’d be wise to check this on breadboard, but I think it’s right.

P.S. You still have power pins, with bypass caps, for the otherwise unused U3. And ERC is going to give you errors until you attach power flags to the rails and ground.

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Thanks for verifying!
And for pointing out the redundant caps.
You are right about the ERC errors, I didn’t know how to solve it. What’s the purpose of the power flags?

ERC wants to make sure power input pins have power sources connected to them, and that power sources aren’t connected to each other, and so on. Power output pins, like on a regulator chip, are power sources, but pins on a Eurorack header for instance are not, so you need to add power flags to tell ERC “these are the power sources”.

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Ok, I present to you: my first attempt at PCB design.
It’s very packed. I considered a few times to switch to SMD or to split it to two boards, but I managed to cram it all somehow. Now I imagine that the tracing is going to be a nightmare.
So, if you see something that can be done better please do tell.
Plus I have a few related questions:

  1. Is there a way to add the component values to the silkscreen or do I do it manually?
  2. I think I’ve done the ground layers (pour?), is there a way to make sure it’s done right?
  3. @AriaSalvatrice, you’ve previously suggested to change the default trace width. Can you tell me where in Kicad (8) is this setting?

Thanks, as always



it’s looking good!

the track width settings are here:

image

there’s a good discussion of track width here:

so far i made my signal width 0.25mm (twice the JLCPCB minimum), and power traces 0.5mm (as traces carrying current heat up less if they’re wide). It’s probably more than necessary though!

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In the footprint properties dialog you can add a value field on the silkscreen layer. You’d have to do each individually. I have a custom footprints library that has component value added.

Hmm. Looks like in the new version they’ve changed this, and now I have no idea how to add values to the silkscreen (or remove them). … OK, maybe what you’re supposed to do is work in the graphic design window of the footprint editor and not the footprint properties dialog: Add a text element to the footprint on the F.Silk layer and set its value to ${VALUE}. Is that it?

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Thanks for the link, lots of good advice there.
A couple of questions arise:

  1. In your experience, is it really that bad to have traces going between IC pins?
  2. If I understand correctly, if you have a GND pour, you can connect to it directly instead of tracing to another grounded component. Is that right, and if so, how do I do that?

I’d be happy to check, however I don’t know how to do what you just explained. :man_shrugging:

Kicad just connects anything that should go to the ground automatically every time the zones are refilled with the B key. You may want to hide them from view and just assume they’re always available.

Sometimes it won’t be able to reach a specific ground pad, in which case, you want to add vias to connect the island or to explicitly draw a connection. (The Design Rules Check will tell you)

A lot of advice about PCB construction was written by people who have not really kept up with the times, telling you about issues that are no longer a thing for modern fabs (the advice to avoid 90 degrees corners due to acid traps is a relic of the past).

Routing a 0.25m signal between the pads of a DIP chip should be safe, at least i know i get away with it, but i try to avoid it. After all, the clearances of doing that are well within the capabilities of the fab i use.

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In fact it’s these connections to the grounded pads (specifically, directly or indirectly to the ground pins on the power header) that make the ground pour ground, not floating. Or at least that’s what you hope will happen, but sometimes you get islands of ground pour that are isolated from any grounded pads and so are floating. In that case, as Aria says, you need to either reroute tracks to open up a path to a grounded pad, or add vias to connect to the (hopefully grounded) pour on the other side, or run a trace to a grounded pad. These things can be very opaque to figure out in the PCB layout process. Maybe easier in KiCad 8, I haven’t used it enough to know.

I’ve never had a problem with it. Of course I don’t do it egregiously, but if it makes the routing much easier, I go with it.

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After grappling with DRC and re-doing the routing many times, I’m finally down to 1 error.


I think I know what it means - the ground ‘island’ is too small for what’s required.
My first question is: how critical is it? At this stage the routing becomes very difficult and I couldn’t satisfy DRC’s requirements, so can I just ignore it?

My second question is: When I’m don’t with DRC, how confident should I be about fabricating the board? Are there important things that DRC misses regularly? Have I gone too wild with the Vias?


“Thermal relief” refers to the spokes that connect a grounded pad to the ground pour. KiCad likes to see at least two spokes out of four. You have a ground pad in the middle of a 2-row header which means only one spoke is possible — and for whatever reason you have a trace connecting to that pad, so even that spoke doesn’t exist. It looks like that trace connects to a via which connects to nothing but the blue ground pour and a red trace to the red ground pour. So I don’t see what purpose that trace fills that a spoke wouldn’t. Anyway, if you have to have a ground pad in the middle of a 2-row header, you will get that error. Likely it won’t be a problem and you can middle click on the error and use the context menu to tell it to ignore it.

I don’t think I’ve ever needed a trace to a ground pad to fix a grounding error before — rerouting existing traces to make a path for the ground pour and adding vias to connect the pours on both sides has always been enough. The red traces instead of looping above the pad in question could go directly if the red trace connecting to ground wasn’t there.

Likewise, this

bitmap

looks pathological. Again you have traces connected to ground that probably can be eliminated. In general I see very little ground pour in the part you’ve shown. I’d want to have more pour area and fewer (no) ground traces.

Just below R2 you have a blue trace connecting to two vias but not crossing any red. The vias could be eliminated and the trace could go on the red side.

Another thing I notice: R2 and R5 are not aligned horizontally. I recommend aligning everything to a 0.1" or 0.05" grid. That tends to keep things neater. (On the other hand, if you’re building Eurorack and are pressed for space, you might need tighter spacing. 0.05" works pretty well for Kosmo boards.)

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Thanks for the detailed explanation.
Some of this ‘ugliness’ in the traces is the result of the “shove” function being turned on during tracing. I received errors from DRC saying that some connections were missing: some of the ground pads, while connected to other ground pads / ground plane were required to connect to other specific ground pads, some of them located on the other side of the board.
I know it looks very ugly, also since I had to mis-align many components (as you noticed) in order to fit everything.
I’m guessing that it would be best to design the board better so that no ground traces are necessary and everything connects to the ground plane, but I just couldn’t figure it out.

That happens all the time, and rerouting traces and adding vias has always been sufficient for me.

It’s a matter of making sure every ground pad and ground pour island connects somehow, directly or not, to the power header ground pins.

You might want to look into the FreeRouting plugin. I use it pretty rarely, preferring hand routing most of the time, but sometimes it’s useful to see how it would do things.

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I didn’t even know there was such a thing, nice!
It looks like it did in a few minutes a much tidier job than what I was able to come up with after hours of work. DRC is still raising many red flags though, some of which are because traces being too close to the board’s edge (the current minimum is 0.5mm and the closest trace is at about 0.25mm) with other errors being ‘Thermal Relief’ and disconnected pads.
Looking at the result, would you say that I’d better pick it from where the plugin left or go back to my manual attempt?