Bissell envelope follower

[analogoutput]

I decided to breadboard the Harry Bissell envelope follower, which uses a much different method than the common rectifier and filter approach. Bissell’s claim is that it yields fast response with no ripple. The article describing it is here (PDF, on pages 2–3). I know @jos has built an EF based on this but with some quite substantial changes, I was interested in investigating the original design.

I get the general idea of what Bissell is doing here though I certainly don’t understand in detail how it works. There are three peak detector circuits with resets being applied round robin by a clock oscillator and a 4017 counter. The idea is to track and hold the peaks of the waveform cycles, with three peak detectors used to guarantee at least one will be holding a correct peak while the others are being reset. Then the output is the maximum of the three peak detector outputs, with some low pass filtering to remove the clock frequency artifacts.

One thing that I don’t understand at all has to do with the clock speed. Bissell writes:

To ensure that one of the detectors holds the highest peak value for the entire input period, the reset clock period is slightly longer than one-half the period of the lowest input frequency

(Or in slightly less convoluted language, the clock frequency is slightly lower than twice the minimum input frequency.) This makes sense: If the clock speed is too high, the most recent waveform peak may be out of scope for even the most senior of the peak detectors. But Bissell’s clock is a Schmitt inverter with a 10k resistor and 100 nF capacitor. If I use the formula from the inverter datasheet to compute the frequency, using typical values for the threshold voltages, I get about 1200 Hz. And on the breadboard I actually get about 2400 Hz! That is way too high by Bissell’s own criterion (the desired minimum input frequency being 80 Hz).

I built the circuit using Bissell’s component values anyway. Here is a scope trace.

The blue trace on the bottom is the envelope from the B2600 used to generate the input signal. The input signal frequency is about 100 Hz. The top two (yellow and cyan) traces are outputs of two of the peak detectors. You can see they’re all over the place, even in the second half of the envelope where the amplitude is flat so all the peaks should be the same height — so clearly the peak detectors aren’t capturing the peaks. And that’s as expected, since the clock rate is so high: the peak will often be out of scope and it’ll just capture some intermediate value instead. The third (magenta) trace is the EF output, and it looks kind of like the original envelope, but with lots of audio frequency structure and a kink about 1/4 of the way through. The rise time is fast but the fall time is much slower, due to the asymmetric low frequency filter.

Clearly the high clock speed is causing problems here. Maybe it was just an error in the schematic. I replaced the 10k resistor by 100k, bringing the clock speed down to around 240 Hz, still a tad high but much closer. Then I got this:

And now it seems much of the time the peak detectors are indeed capturing the peaks, you can see the correct envelope shape buried in there. But then there are big upward glitches that spoil everything and completely ruin the output envelope. (And yes, those glitches are present on the third peak detector too.)

I’d be tempted to chalk the glitches up to some kind of breadboard flakiness, though it’s can’t be that flaky if it’s affecting all three the same way… but in fact it’s not entirely dissimilar to what I see in an LTSpice simulation:

(Click on the image to see it more legibly.) The cyan trace is the input signal — again about 100 Hz, this time with just a sawtooth for the envelope. The green, blue, and red traces are the peak detector outputs. Again you can see they correctly capture the peaks a lot of the time, but then there are times they glitch upward. It looks to me like the upward glitches tend to happen when the reset pulse occurs close to an input signal peak.

So it seems as if the reset mechanism is messing things up, somehow adding charge to the cap instead of discharging it.

Not sure where to go with this. It seems an interesting idea, though I’d say to take Bissell’s “fast response and no ripple” claim with a grain of salt — you certainly do get something like ripple if the input frequency is too low compared to the clock speed, just as you do with a rectifier-filter EF if the input frequency is too low compared to the filter cutoff, and the response to falling transients appears to be no better than the ARP 2600 EF, though it does look like it does much better on rising transients. Which is something, but only if the glitchy behavior can be cured.

[analogoutput]

I tried replacing (in the simulation) the NPNs with MOSFETs. Not that I know anything about using MOSFETs. But the result looks a lot better:

Here the gray trace is the EF output. Very fast rise, though it rounds off the sharp peak.

One thing you might notice is the cap doesn’t discharge all the way to zero. Evidently the reset pulse isn’t long enough. I changed the 1 nF caps on the clock lines to 2 nF and that seemed to fix it.

Here’s a square envelope, sharp rising and falling edges:

In this one the pink trace is the EF output. Its falling edge is slow for two reasons. One is the low pass filter slowing the fall time down. The other is, if you look closely at the red trace (the senior peak follower at the end) and the cyan trace (the input signal), the peak follower stays high for more than 2 clock periods after the input signal stops. That’d be something like 12 ms for a 150 Hz clock. Then that’s followed by the RC decay for around 10 or 15 more ms. So yes, very snappy on the rising transient, but pretty sluggish on the fall.

The gray trace is the ARP 2600 EF output for comparison. It gets down to zero faster but starts much slower and shows more ripple.

I have no physical MOSFETs though, never used them. So I can’t try this out right now on the breadboard.

(Edit: Replaced screen shot for unsaturated ARP result)

[analogoutput]

That was done with I guess an idealized model of a MOSFET. I replaced that with a model of a real world MOSFET (VN2222LL) and the upward glitches came back, though not as large as before. On a whim I tried bumping the 10k resistors leading to the caps up to 100k and that improved it:

Just one glitch visible here, a little after 80 ms, and quite small.

The pink trace is the EF output. The falling edge is slow, for two reasons. One is the low pass filter slowing the fall time down. The other is, if you look closely at the red trace (the senior peak detector at the end) and the cyan trace (the input signal), the peak detector stays high for more than two clock periods after the input signal stops. That’d be something like 12 ms for a 150 Hz clock. Then that’s followed by the RC decay for around 10 or 15 more ms.

The gray (appropriately!) trace is the ARP 2600 EF output for comparison. It gets down to zero faster, but it starts much slower and shows more ripple.

Then I thought, okay, this is a pretty short (~200 ms) envelope with square edges, how about a longer envelope with slower rises and falls. I tried a ~2 second piecewise linear ADSR envelope… and was shocked. There are more glitches — well, there’s ten times as many cycles, so ten times as many glitch opportunities. But they’re also much larger than the above. Why? No idea.

The envelope output is there, in pink, but if you can’t see it, here’s a plot showing just that (cyan) and the ARP 2600 EF output (blue), along with the original input envelope (red):

Which is pretty horrible. Assuming the hardware really behaves like this, I don’t think this design is usable without some way to reset the peak detectors in a clean, glitch free way. Since I don’t have a clue why the glitches occur I don’t have much to go on for a cure. And I’m not sure there’s enough motivation, other than that very fast response time on rising transients.

Added: OK, I can get the glitches down to negligible level, I think. The problem is the reset pulse is too fast. I’d already changed the 1 nF cap to 2 nF, but pushing it up all the way to 20 nF nearly kills the glitches. What bad effects that might have I don’t know.

Now it looks like this:

(Bissell in cyan, ARP in green, input envelope in blue.) There’s a little trash on the sustain but probably not enough to care about. You do see a couple other issues. Thanks to the asymmetric filter there’s no ripple on the flat and falling pieces, but there’s definite ripple on the rising slope. Also, it takes off a bit late at the start and gets to zero at the end slightly too soon: I think that’s because of the diode drop after the peak detectors. Presumably those could be made precision rectifiers, but that adds three more op amps to an already complicated design.

For an envelope like this I still prefer the ARP design. The main advantage for Bissell is on envelopes with a very fast rise.

[Farabide]

Superb for use with analogue controllers for some brio in a performance. Good stuff!