# Interpreting bypass caps on a schematric **URL:** \ **Category:** DIY STUFF\ **Created:** [January 17, 2022, 3:22pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504 "2022-01-17T15:22:35Z")\ **Posts on this page:** 15\ **Page:** 1
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 17, 2022, 3:22pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/1 "2022-01-17T15:22:35Z")
So I’m breadboarding a MFOS WSG, but am unsure what to do about the bypass caps in the schematic. **C9** and **C10** are shown as **0.1µF** and after reading various posts on here, watching an Aussie bloke on YouTube and reading various linked to blogs, I understand what they’re for. What I don’t understand is where they go. The original schematic has two chips, a _CD40106_ and a _LM741_, do I put both caps on one chip, both chips, or just between the +9v and GND rails…? ![MFOS WSG Schematic](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/b/2/b2e04757447db9f2cef1665fb111ac40fec06995.gif) In David Haillant’s [WSG SMD rework schematic](https://www.davidhaillant.com/wp/wp-content/uploads/wsg-1.2-20191021.pdf), he has three bypass caps and three chips. This all leaves me wondering if it’s one cap per chip…? ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [January 17, 2022, 3:35pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/2 "2022-01-17T15:35:36Z")
Best practice is one bypass cap per power pin per chip, placed close to that pin. So two bypass caps for op amps with ±12 V supply. Here I guess there’s one LM741 and one CD40106, each with one +9 V pin, so one cap near each of those. Here’s the MFOS PCB layout: ![bitmap](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/7/f/7f3a1c65418a15e93a8d49b140e703144be75fae.png) ---
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 17, 2022, 4:02pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/3 "2022-01-17T16:02:52Z")
Totally forgot about looking at the board layout… 🤦‍♂️ Thanks! ---
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 18, 2022, 8:39am UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/4 "2022-01-18T08:39:27Z")
I was thinking about this a bit more. What’s confusing me isn’t the MFOS schematics, but David Haillant’s one. If he’s running the final op amp off +/112v then shirley there needs to be four bypass caps, rather than three…? One on the _CD40106_, one on the first _LM741_ and two (one for +ve, one for -ve) on the last _LM741_…? **C11** in his schematic seems to be a **220µF** electrolytic, rather than a small ceramic, which I don’t understand. ---
**Author:** ![Dud](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dud/32/610_2.png) [@Dud](https://lookmumnocomputer.discourse.group/u/Dud)\ **Post date:** [January 18, 2022, 9:22am UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/5 "2022-01-18T09:22:31Z")
When a chip are powered by + and GND you only need one cap on the + if the chip are powered by +/- you need 2 caps 🙂 ![Sans titre](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/f/9/f97e8f6a490cb4e87b91ba7d8c5dc0d283d04b87.jpeg) ---
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 18, 2022, 9:26am UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/6 "2022-01-18T09:26:59Z")
Shirley the schematic should then show four caps in the relevant section, but it only shows three, all hanging off the 9v rail… 🤷 ![Screenshot_20220118_092428](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/0/c/0c7cf60842cacfacb632c655936bfc193af3c25d.png) ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [January 18, 2022, 12:40pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/7 "2022-01-18T12:40:49Z")
Here’s what I think’s happening: It’s confusingly laid out, but C9 and C10 are bypass caps for the +9 V powered chips, and C101 and C102 are bypass caps for U102. If you look in the [interactive BOM](https://www.davidhaillant.com/wp/wp-content/uploads/wsg-1.2-ibom-2019-07-04.html) there’s a PCB layout which supports this. And C11 is … an overly large (HUGELY large) output cap for the +9 V regulator? It does sit next to the regulator on the PCB. And there’s no electrolytic bypass caps on the ±12 V rails? That astonishes me. Almost any other designer would have put something like 10 µF from rails to ground near the power header, and I would probably have put no output capacitor at all on the 78L09, definitely not one anywhere near as large as 220 µF. ---
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 18, 2022, 2:03pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/8 "2022-01-18T14:03:46Z")
Ah, that would explain the two caps next to the 9v regulator in this bit of the schematic: ![Screenshot_20220118_135758](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/4/d/4d60127e604a36962a31d7be6971724d782655e9.png) I think I see what’s going on now. 🙄 The **220 µF** is part of the _Twilight Zone_ power on/off section of the original MFOS schematic. Thanks for taking the trouble to explain all that to me, much appreciated. Hopefully this means I can navigate similar stuff in other schematics. 👍 ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [January 18, 2022, 2:26pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/9 "2022-01-18T14:26:57Z")
> [@fatboab](#): > > The **220 µF** is part of the _Twilight Zone_ power on/off section of the original MFOS schematic. Ah, right, I see. Not sure why that’s there… unless it’s to deliberately make it make strange noises when powered off as alluded to in the comment. Certainly I see no reason for it to be there in the Eurorack version. And I’m really perplexed by the lack of electrolytic bypass caps. Haillant has them on all their other modules, it looks like. ---
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 18, 2022, 3:50pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/10 "2022-01-18T15:50:48Z")
> [@analogoutput](#): > > Ah, right, I see. Not sure why that’s there… unless it’s to deliberately make it make strange noises when powered off as alluded to in the comment. Yeah, you pull the power out and it continues to make fainter and fainter weird noise for about 30 seconds… ---
**Author:** ![handsomegenius](https://avatars.discourse-cdn.com/v4/letter/h/898d66/32.png) [@handsomegenius](https://lookmumnocomputer.discourse.group/u/handsomegenius)\ **Post date:** [January 19, 2022, 1:08am UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/11 "2022-01-19T01:08:57Z")
Do small ceramics on the power pins actually matter that much for analogue audio? They’re mostly effective far above the audio band, I thought. Pretty crucial when you have a lot of digital switching kicking all sorts of high frequency noise into the power supply. ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [January 19, 2022, 2:27am UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/12 "2022-01-19T02:27:09Z")
Probably don’t matter that much. Sam is known to leave them out a lot, and I’ve left them out temporarily when I’ve run out of them and not noticed any ill effects. On the other hand, they cost like a penny a piece, take up almost no real estate, and have no bad effects I know of, so I use them. ---
**Author:** ![Caustic](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/caustic/32/15588_2.png) [@Caustic](https://lookmumnocomputer.discourse.group/u/Caustic)\ **Post date:** [January 19, 2022, 3:03pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/13 "2022-01-19T15:03:51Z")
A post was merged into an existing topic: [Price reductions](https://lookmumnocomputer.discourse.group/t/price-reductions/2338/44) ---
**Author:** ![fatboab](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fatboab/32/12330_2.png) [@fatboab](https://lookmumnocomputer.discourse.group/u/fatboab)\ **Post date:** [January 19, 2022, 7:00am UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/14 "2022-01-19T07:00:55Z")
I didn’t have then in until a couple of days ago, and there was no noticeable difference. I’m running off a 9v PSU though, so maybe running off a 9v battery like the WSG was designed to do, they would make more of a difference when the battery starts to go… 🤷‍♂️ @Caustic was that supposed to be in the [bargain’s thread](https://lookmumnocomputer.discourse.group/t/price-reductions/2338)…? ---
**Author:** ![Caustic](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/caustic/32/15588_2.png) [@Caustic](https://lookmumnocomputer.discourse.group/u/Caustic)\ **Post date:** [January 19, 2022, 3:02pm UTC](https://lookmumnocomputer.discourse.group/t/interpreting-bypass-caps-on-a-schematric/4504/15 "2022-01-19T15:02:38Z")
Hahaha woops! Sorry about that.