# First pcb prototype attempt **URL:** \ **Category:** DIY STUFF\ **Created:** [April 12, 2020, 4:28am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596 "2020-04-12T04:28:03Z")\ **Posts on this page:** 20\ **Page:** 1
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 12, 2020, 4:28am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/1 "2020-04-12T04:28:03Z")
![image](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/1/1a707d8b6f2733cc38b244698ac4211ba9ef8cfb.jpeg) Hey guys, I’m getting close to sending off files to JLCPCB for my first try at designing a pcb. It’s a buffered/passive multiple, two pcbs will stack behind the panel. 1/ should I move the pcbs together and do a perforation I can break later to separate? Or separate the project into two files and order a set of each? 2/ for +12 and -12 I used 1mm trace width and for everything else I used 0.75mm. Ground net is in copper pour. Is this adequate? I don’t know the science behind it but looking at some mfos pcbs I have seems to be about that thick 3/ any other mistakes a first timer might make? Thanks guys! Btw I watched and followed along with the digi-key kicad tutorial series on YouTube ---
**Author:** ![fredrik](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fredrik/32/682_2.png) [@fredrik](https://lookmumnocomputer.discourse.group/u/fredrik)\ **Post date:** [April 12, 2020, 7:12am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/2 "2020-04-12T07:12:26Z")
1. I think it’s mostly cost neutral (they charge more for multiple designs in a single PCB), but it doesn’t really matter, so you can just play around a bit in the ordering tool. Separate PCBs tend to look slightly better. 2. 1 mm is good for a couple of amperes, so more than enough. You have plenty of space, though, so no need to change anything here. 3. See below. Here’s some random comments/tips/nits/opinions, off the top of my head. Feel free to ignore some or all of them; it’s your PCB after all 😃 - Double-check hole sizes, footprints, and that nets makes sense (not sure what tool you’re using, but many tools show you the net name for each hole if you zoom in enough). - What’s up with all the electrolytics? I’d expect one 10 µF or so per rail close to the power connector, but what are the other two? - The ceramics placement also looks a bit arbitrary – decoupling capacitors should be placed close to the chips’ power pins (“as close as possible” but you don’t have to overdo it). - On the other hand, if any of these are part of a signal path, consider using the footprint for a polyester capacitor; you can still use a ceramic when building, but if you decide to go fancy, putting a narrow component in a slightly wider footprint is easier than the other way around. - Consider spelling out what the trimmers/connectors are for in the silkscreen, so you don’t have to remember what’s what when trimming/hooking things up. - Clearly mark the + and − sides of the power connector in the silkscreen, to make sure there’s no chance for confusion when building and plugging things in. - Consider using component values in the silkscreen instead of component numbers, to save time when building. That’s very much a personal preference, though, so feel free to ignore this. - If using component numbers, consider keeping them outside the footprint, so you can still read them once built. - Are the missing mounting holes in the component PCB a rendering issue, or are they actually missing? That said, my #1 advice for PCB design is to keep in mind that there will be some silly mistake in this one. Or if not, in your next one 😀 ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [April 12, 2020, 11:22am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/3 "2020-04-12T11:22:13Z")
I hardly know what I’m doing either, but lately I’ve been using 0.75 mm for power buses and 0.25 mm for everything else, which is for instance roughly what I see in the Music Thing Modular Turing Machine PCB. ![Screenshot from 2020-04-12 07-21-28](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/a/ae3ea352b16525bcc79ca537a43f08dbebb02c05.png) ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 12, 2020, 3:19pm UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/4 "2020-04-12T15:19:22Z")
Fredrik thank you for taking the time writing those tips. I will definitely be implementing the changes, starting with the stuff I understand. As far as the electrolytics, it’s probably cause I simply doubled a schematic and doubled up things unnecessarily. that being said the schematic has polarized capacitors called out at really small values: ![image](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/6/650452f38a9f0c3613b3f3d641ff66802f72f303.jpeg) I know the resistors aren’t typical values and I’ve swapped to closest substitutes. I guess I should probably take time to test the circuit on breadboard now that I think about it cause I’ve made a few changes and I really don’t know what I’m doing in this regard 😅 The missing mounting holes are some graphical error cause they show up when I upload a Gerber to one of the pcb houses. Definitely going to take the time to do the silkscreen changes. Thanks again @fredrik ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [April 12, 2020, 3:46pm UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/5 "2020-04-12T15:46:35Z")
Those capacitors aren’t polarized. Sometimes people use a -|(- for polarized and -||- for unpolarized, but in this case it’s -+|(- for polarized and -|(- for unpolarized. In particular the 0.1µF caps between V- and ground or V+ and ground are bypass caps, you can use ceramics and they should go close to the ICs. ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 12, 2020, 7:38pm UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/6 "2020-04-12T19:38:26Z")
![image](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/7/744cc627234bf5d2297799273b0340efa484423b.jpeg) Changed component number silkscreen to component values Added descriptors for trim pots and power header Changed ceramic cap footprints to larger rectangle prints and moved close to ICs Changed 0.1uF electrolyitcs to ceramics and moved to ICs ---
**Author:** ![twinturbo](https://avatars.discourse-cdn.com/v4/letter/t/8baadc/32.png) [@twinturbo](https://lookmumnocomputer.discourse.group/u/twinturbo)\ **Post date:** [April 13, 2020, 5:39am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/7 "2020-04-13T05:39:17Z")
How did you get the 3D render with components? Rob ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [April 13, 2020, 5:44am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/8 "2020-04-13T05:44:09Z")
Alt-3 in KiCad. Post must be at least 20 characters. ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 13, 2020, 5:49am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/9 "2020-04-13T05:49:08Z")
Or in the “view” header at the top ---
**Author:** ![twinturbo](https://avatars.discourse-cdn.com/v4/letter/t/8baadc/32.png) [@twinturbo](https://lookmumnocomputer.discourse.group/u/twinturbo)\ **Post date:** [April 13, 2020, 9:23am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/10 "2020-04-13T09:23:27Z")
Ta … Filling up the characters… ---
**Author:** ![twinturbo](https://avatars.discourse-cdn.com/v4/letter/t/8baadc/32.png) [@twinturbo](https://lookmumnocomputer.discourse.group/u/twinturbo)\ **Post date:** [April 13, 2020, 9:42am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/11 "2020-04-13T09:42:40Z")
OMG thats cool… I had to rework my edge cuts to exact dimensions ( is there a way to draw a rectangle??? and remove my other Arty Cuts… ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 17, 2020, 11:23pm UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/12 "2020-04-17T23:23:21Z")
![image](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/2/21c75a78e0c6ba1af0c936f43eb35ada44e73dfd.jpeg) Hey, it works! @analogoutput @fredrik thank you guys wouldn’t have worked without your help! ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [April 17, 2020, 11:40pm UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/13 "2020-04-17T23:40:46Z")
That was FAST. Where was it fabbed? ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 17, 2020, 11:41pm UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/14 "2020-04-17T23:41:52Z")
JLC. Standard dhl shipping. Crazy fast. I don’t think it was more than a week ---
**Author:** ![fredrik](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/fredrik/32/682_2.png) [@fredrik](https://lookmumnocomputer.discourse.group/u/fredrik)\ **Post date:** [April 18, 2020, 12:51am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/15 "2020-04-18T00:51:51Z")
Man you’re quick. From draft to finished build in less than a week? And looks nice and clean and works too? Congrats! 😃 ---
**Author:** ![Caustic](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/caustic/32/15588_2.png) [@Caustic](https://lookmumnocomputer.discourse.group/u/Caustic)\ **Post date:** [April 18, 2020, 1:01am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/16 "2020-04-18T01:01:07Z")
WOW! really nice! ![1479262963024](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/c/cba7ac174a1c12879e25aabafc971fb4ffb1dc63.png) ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 18, 2020, 1:03am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/17 "2020-04-18T01:03:30Z")
I did make one mistake on the board connectors. Got some lines swapped ![image](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/e/ec26acc0799a14f050d4b4c74d5cbee977688171.jpeg) Was intending to have blues as the inputs for each buffered mult. Got the arrangement flipped so the red jack is the input on the right side. I could fix it by running wire instead of connectors but will probably just adjust my faceplate layout and deal with it. ---
**Author:** ![Caustic](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/caustic/32/15588_2.png) [@Caustic](https://lookmumnocomputer.discourse.group/u/Caustic)\ **Post date:** [April 18, 2020, 1:07am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/18 "2020-04-18T01:07:38Z")
as mistakes go thats pretty minor 🙂 . its really just fluff. any functions impacted? ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 18, 2020, 1:07am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/19 "2020-04-18T01:07:42Z")
Gotta say, going thru and learning the kicad process is rewarding, nice having the time to learn something new. Now Im ready for more, probably going to ‘PCBify’ this switch mult for some more practice. ![image](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/2X/8/8ea9dfd02a176d079a56aa472653183d5841d118.jpeg) ---
**Author:** ![CTorp](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/ctorp/32/15023_2.png) [@CTorp](https://lookmumnocomputer.discourse.group/u/CTorp)\ **Post date:** [April 18, 2020, 1:08am UTC](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596/20 "2020-04-18T01:08:15Z")
Nope will work as intended! [Next page](https://lookmumnocomputer.discourse.group/t/first-pcb-prototype-attempt/596.md?page=2)