# 4031 Gate Looper **URL:** \ **Category:** DIY STUFF\ **Created:** [October 11, 2023, 9:11am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604 "2023-10-11T09:11:43Z")\ **Posts on this page:** 20\ **Page:** 1
**Author:** ![BobbyZincone](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/bobbyzincone/32/30171_2.png) [@BobbyZincone](https://lookmumnocomputer.discourse.group/u/BobbyZincone)\ **Post date:** [October 11, 2023, 9:11am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/1 "2023-10-11T09:11:43Z")
Hello everyone, I’m usually just lurking around, sometimes asking for help if I’m stuck and don’t know what to do. I recently built a gate pattern looper that some of you may find interesting. I haven’t found any post covering such a module, so here you go. # 4031 Gate Looper This is a 64-step gate/trigger sequencer (or looper) built around the CD4031, a 64-stage shift register. An Arduino-less big button-ish module; less fancy and has fewer functions but more DIY (in my opinion), and no coding is required. The module is based on Kristian Blasol’s schematics. See the original schematic [here](https://www.dropbox.com/s/tji4l7hp1szu9ux/4031%20tap%20sequencer.pdf) (Dropbox) and watch Kristian’s video [here](https://www.youtube.com/watch?v=VAhJYkfZ04A) (Youtube). > **Note:** Kristian’s design itself is based on a schematic of Tiny Dazzler/Magic Pulsewave, which you can find [here](https://www.dropbox.com/s/vyctydpan537o7a/TapLooper-AMagicPulseWave.png) (Dropbox) I somewhat modified the circuit, see the details below. I haven’t breadboarded this before the build, and I’m not an expert: I only have experience with electronics through DIY synth. The module works, but some stuff might be improved. ## 1. Schematic This is my modified schematic: ![4031schem](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/2/0/20eede47dfb8d392051aab1e87a49908dba40965.jpeg) _4031 Gate Looper schematic_ All semiconductors are general-purpose components, nothing fancy is needed: - 1N4148 for diodes (except LEDs) - BC547 (or 2N3904) for transistors - TL07x for op-amps The reset wiring could be tricky, see the explanation below (under _Limitations_) No calibration is needed. ### 1.2 List of modifications These are the modifications I implemented (see the labeled schematic below): **(a)** Add a 100K resistor to GND before both op-amp V+ for input impedance **(b)** Add a diode in series before both op-amp V+ for reverse polarity protection **(c)** Replace 1k resistor to GND with 47k in the voltage dividers before both op-amp V- for a better functioning comparator (so the minimum input is raised to +3.84V instead of +0.12V – which was too small in my opinion) **(d)** Connect buffered input to the output stage via a diode to include tap/in as direct output **(e)** Add a diode after the Reset stage to protect 4031 Q (pin 6) and DIN (pin 15) from the tap input **(f)** Rework output stage **(g)** Add gate buffer for CMOS output protection (Ken Stone-style) **(h)** Replace 10k current limiting resistors before LEDs with 1k (maybe this isn’t necessary, I was afraid the LEDs won’t be shiny enough) ![4031schemMod](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/1/b/1b06b8dbd39b1095e5a8939282bc66cc01926bf0.jpeg) _4031 Gate Looper schematic with modification labels_ ## 2. Usage In a nutshell: to record a pattern, connect a clock input to CLK IN, then tap in the pattern via the TAP button or the TAP IN jack. Front panel description: | Component | Type | Explanation | | --- | --- | --- | | CLK IN | Input | A jack for the clock input. Around +5V is enough. | | CLK LED | Indicator | An LED indicating if CLK IN is high. | | TAP (MOM) | Input | A momentary switch for manual DATA input. | | TAP IN | Input | A jack for external DATA input. Can be used to record preset patterns (e.g., a sequenced gate pattern) or input from external triggers, e.g., a piezo drum trigger. Around +5V is enough. | | GATE LED | Indicator | An LED indicating if GATE OUT is high. | | TRIG OUT | Output | A jack for the trigger output. The trigger is basically the chopped-up version of the gate output: it is high if the CLK IN and GATE OUT are both high; i.e., if both the CLK LED and the GATE LED are illuminated. | | GATE OUT | Output | A jack for the gate output. The gate is continuously sent as long as the GATE LED is illuminated. | | RES | Input | A switch for resetting the memory. The memory is only reset for the next cycle. See the explanation under _Limitations_. | | RES (MOM) | Input | A push button for resetting the memory. The memory is only reset for the next cycle. See the explanation under _Limitations_. | Further information: The TRIG OUT and GATE OUT level is defined by the voltage dividers in the output buffer stage. With a ±12V PSU, the output should be around +5.4V (I haven’t yet measured though). If using a ±15V PSU, or a different output level is needed, adjust the values. If the CLK LED or the GATE LED is not illuminated, the input level is probably too low. CLK IN and TAP are both set up to work with +5V inputs. If using a ±15 PSU, or working with lower input levels, adjust the values of the voltage divider before V- of the op-amps. Consider the input voltage drop due to the diode. ## 3. Limitations ### 3.1 Recorded gate/trigger is not excluded immediately upon reset One bit of memory is reset if 4031 Q (pin 6) is not sent back to DIN (pin 15); i.e., the reset switches should be wired so that the feedback is not broken by default (this is why an NC MOM switch is required). If the reset switch is flicked open or the MOM is pushed, the actual bit of memory is reset to low, but the gate is still included in the output. This also means that if the reset switch is flicked open, the whole memory is reset after one cycle. So there is room for improvement. E.g., the output could be connected to GND if the reset is engaged; so the reset functions immediately (by excluding the gate from the output). This could be solved with a couple of extra components. The switch reset can be replaced with a simple DPDT switch that cuts the output (and leads to GND), so that would work as a reset + mute switch; see the image below. (Thinking of this, maybe I’ll replace the switches in my build too.) ![4031schemOutGND](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/b/5/b5ddd9dc750411d0a70d4a739e71959c676a3c81.jpeg) _Reset + Mute modification_ The problem of the push button would still be there. Maybe an OFF-ON-(OFF) DP3T switch, is there such a thing? ### 3.2 64-step limit The module can only process 64 bits: no less and no more. This means that only 64-step-long patterns can be recorded. However, a clock divider in the patch can do some wizardry. E.g., using a fast clock to drive the 4031 looper and the CLK/4 out for driving a sequence leads to 16-step long gate sequences (and the trigger output will be funny, what a feature). Still, no unusual sequence length can be set; e.g., 64 cannot be divided with 3, 5, 7… you can do the math. ### 3.3 Precision The tap input requires some practice, but I don’t think it’s impossible to master. Also, the TAP IN can be used to record precise taps from a sequencer. ## 4. Build recommendations I built a quad looper; i.e., the schematic above four times, with some common components. Some notes for that: - 2 × TL074 were used for the comparators - 1 × CD4081 is used for all the AND gates - A push button with an integrated LED is used for the manual tap input; its LED is used for the gate output LED - The CLK input is chained using the jack switches (A \> B \> C \> D). The Reset + Mute mod could worth a try too. ## 5. Impression and example use cases I find the 4031 gate looper very versatile and easy to use. It could be used to record gate or “chopped up” trigger patterns easily during a live performance. Just don’t forget to start the memory reset before the last cycle or just mute the channel it is driving. Here are some use cases for example. - **Drum trigger** : Maybe the most general application is to use the gate/trigger output as the trigger for different drum modules (or percussive bass). See this [video](https://drive.google.com/file/d/1fBSM99T_xxIrcYysp8e8OSX4VqjwqMAb/view?usp=sharing) (Google Drive) for an example (not the best quality, but you get the idea; the same clock is used for all the loopers.) You can use the trigger out for chopped-up hi-hats. Also, connect piezo drum triggers to the TAP IN and now you have a fancy drum tap looper. - **Sequencer pattern** : Set the clock of a sequencer; i.e., use different note lengths for the steps. You could play with the number of gates in the 4031 loop and the number of steps of the sequencer to get unusual patterns (e.g., 13 taps vs. a 7-step sequence). - **Broken chord patterns** : Use the gate output to trigger four different EGs to open particular VCAs of individual VCOs. This is how I used my freshly built module but I’m sure there are other use cases. ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 11, 2023, 3:35pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/2 "2023-10-11T15:35:37Z")
I also got my motivation from Kristian Blasol’s video. I’m gonna build the simple circuit on breadboard first just to get a firm understanding of it and to make sure I can get it to work in it’s simplest form. I really like your schematic. I plan to build it after a successful breadboard trial. Thank you! Great post. I feel like I understand the circuit much more clearly now. ---
**Author:** ![BobbyZincone](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/bobbyzincone/32/30171_2.png) [@BobbyZincone](https://lookmumnocomputer.discourse.group/u/BobbyZincone)\ **Post date:** [October 11, 2023, 3:43pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/3 "2023-10-11T15:43:21Z")
Great! I’m glad this helped. If you’ll have any questions I’ll try to answer. Keep us posted! ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 12, 2023, 6:34am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/4 "2023-10-12T06:34:56Z")
There’s a lot to be done with this for sure. 🔥🤖 ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 13, 2023, 4:26am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/5 "2023-10-13T04:26:00Z")
Is there a reason my 4031 doesn’t loop 64 bits? ---
**Author:** ![BobbyZincone](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/bobbyzincone/32/30171_2.png) [@BobbyZincone](https://lookmumnocomputer.discourse.group/u/BobbyZincone)\ **Post date:** [October 13, 2023, 6:49am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/6 "2023-10-13T06:49:19Z")
The porblem may come from the clock. Check the clock sensitivity and your clock input voltage. Are you using a buffer? What are you using to clock the 4031? ---
**Author:** ![Gasboss775](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/gasboss775/32/26802_2.png) [@Gasboss775](https://lookmumnocomputer.discourse.group/u/Gasboss775)\ **Post date:** [October 13, 2023, 7:39am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/7 "2023-10-13T07:39:47Z")
Im thinking about looking into something like this but using a 4006 shift register, these have a total of 18 stages but with multiple taps potentially allowing multiple feedback loops, not sure yet if this would result in something useful or totally chaotic. I have a few of these chips so could make longer loops. Here is the datasheet: [4006b](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604) ---
**Author:** ![Gasboss775](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/gasboss775/32/26802_2.png) [@Gasboss775](https://lookmumnocomputer.discourse.group/u/Gasboss775)\ **Post date:** [October 13, 2023, 7:54am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/8 "2023-10-13T07:54:15Z")
If the incoming clock is too slow (in terms of rise and fall times) some CMOS chips can misbehave in that one clock cycle can be misinterpreted as multiple clock pulses. If that is the case here then it could explain why you’re not getting the full 64 steps, as the circuit is racing through the steps due to misinterpreting the clock pulses as several transitions instead of just one. ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 13, 2023, 7:59am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/9 "2023-10-13T07:59:42Z")
It mostly seems like it’s looping faster. Like it’s getting 65 or 66 triggers from what should be 64 triggers from my clock divider (I just use the /8 output as a metronome for ever 8 cycles so I can count). Usually it loops “early”. Meaning it hits 64 before my divider counts it… ---
**Author:** ![BobbyZincone](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/bobbyzincone/32/30171_2.png) [@BobbyZincone](https://lookmumnocomputer.discourse.group/u/BobbyZincone)\ **Post date:** [October 13, 2023, 9:02am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/10 "2023-10-13T09:02:44Z")
Nice! I looked into the datasheet: I’m clueless. Sounds fun, though! ---
**Author:** ![Gasboss775](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/gasboss775/32/26802_2.png) [@Gasboss775](https://lookmumnocomputer.discourse.group/u/Gasboss775)\ **Post date:** [October 13, 2023, 9:30am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/11 "2023-10-13T09:30:00Z")
This is probably because some clock pulses are being interpreted as more than one, so it is reaching the end of the 64 stages quicker than it should. A schmitt trigger at the clock input could fix this ---
**Author:** ![Gasboss775](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/gasboss775/32/26802_2.png) [@Gasboss775](https://lookmumnocomputer.discourse.group/u/Gasboss775)\ **Post date:** [October 13, 2023, 9:42am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/12 "2023-10-13T09:42:46Z")
@Dogstar13 You could try this mod to make the clock comparator into a scmitt trigger. ![Screenshot_20231013_103403_Chrome~2](https://global.discourse-cdn.com/free1/uploads/lookmumnocomputer/original/3X/4/a/4a9efc6fe0f4722b28c781aa18c253f484ebeaf5.jpeg) You might need to experiment with the value of the resistor ---
**Author:** ![BobbyZincone](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/bobbyzincone/32/30171_2.png) [@BobbyZincone](https://lookmumnocomputer.discourse.group/u/BobbyZincone)\ **Post date:** [October 13, 2023, 1:23pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/13 "2023-10-13T13:23:38Z")
Not sure if you’ve come across this, but the YUSYNTH random gate module also incorporates the 4006. Quite interesting idea. [https://yusynth.net/Modular/EN/RANDOMGATE/index.html](https://yusynth.net/Modular/EN/RANDOMGATE/index.html) ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 13, 2023, 2:50pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/14 "2023-10-13T14:50:26Z")
I tried that but with a 5M. I’m gonna solder a strip board and see if it helps with interference. ---
**Author:** ![analogoutput](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/analogoutput/32/29663_2.png) [@analogoutput](https://lookmumnocomputer.discourse.group/u/analogoutput)\ **Post date:** [October 13, 2023, 4:06pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/15 "2023-10-13T16:06:21Z")
> [@Gasboss775](#): > > If the incoming clock is too slow (in terms of rise and fall times) some CMOS chips can misbehave … and some op amps are slower than others, meaning some counterfeit op amps are slower than the genuine ones… ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 13, 2023, 9:05pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/16 "2023-10-13T21:05:16Z")
So, since I’m using cheap Chinese lm358 ripoffs I could put a genuine tlo72 in the circuit and see if that helps?.. I have 1 or 2 around here somewhere… ---
**Author:** ![Gasboss775](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/gasboss775/32/26802_2.png) [@Gasboss775](https://lookmumnocomputer.discourse.group/u/Gasboss775)\ **Post date:** [October 14, 2023, 8:45am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/17 "2023-10-14T08:45:34Z")
Should be worth a try. ---
**Author:** ![Gasboss775](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/gasboss775/32/26802_2.png) [@Gasboss775](https://lookmumnocomputer.discourse.group/u/Gasboss775)\ **Post date:** [October 14, 2023, 9:00am UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/18 "2023-10-14T09:00:09Z")
Looks interesting! Will keep this in mind. 😀 ---
**Author:** ![Dogstar13](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/dogstar13/32/23149_2.png) [@Dogstar13](https://lookmumnocomputer.discourse.group/u/Dogstar13)\ **Post date:** [October 15, 2023, 8:55pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/19 "2023-10-15T20:55:42Z")
Success! I rebuilt the circuit on a much better breadboard with a tlo72 and it ticks like a Swiss watch now. I’m just waiting for better switches and the logic chips to come in the mail so I can put it on strip board and make a panel. Thank you all for the suggestions! ---
**Author:** ![BobbyZincone](https://yyz2.discourse-cdn.com/free1/user_avatar/lookmumnocomputer.discourse.group/bobbyzincone/32/30171_2.png) [@BobbyZincone](https://lookmumnocomputer.discourse.group/u/BobbyZincone)\ **Post date:** [October 15, 2023, 9:35pm UTC](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604/20 "2023-10-15T21:35:31Z")
Woohoo, so glad to read that! Thanks for letting us know. [Next page](https://lookmumnocomputer.discourse.group/t/4031-gate-looper/6604.md?page=2)